Google's Two New TPUs Are Old Chips in New Boxes. That's the Point

The last three posts were all Nvidia: the Naver stake, the telco retrofit, and letting Rebellions into the rack. Today it's the company most people now treat as Nvidia's most serious alternative. On Monday, Google announced two new TPU systems, the TPU 8i Max and the TPU 8tx. That makes four eighth-generation TPU systems in one year, which Google says is a first. Bloomberg broke the story, and Reuters and others picked it up (CNBC-TV18, relaying Reuters; Data Center Knowledge).

TL;DR

Neither is a new chip. The 8i Max puts two existing TPU 8i chips in one package for long-context AI agents. The 8tx takes the existing TPU 8t chip and pairs it with AMD EPYC processors so data stays encrypted and isolated even while it's being worked on.
The 8i Max doubles speed, not storage. Google says it doubles compute, on-chip memory (SRAM) and memory bandwidth. But a Google exec put its main memory at 384 GB, only about 1.33x the single chip's 288 GB, not 2x (my math).
You can't buy either yet. Google gave no price, regions or date. Google's Amin Vahdat told Bloomberg they arrive in 2027 (Techmeme summary of Bloomberg).
The business is the real story. Google Cloud revenue doubled to $30.7 billion last quarter, and Alphabet called TPU system sales "a meaningful contributor" (Alphabet Q3 release). Google says TPUs now have nearly 100 customers.

Google's eighth-gen TPU lineup: two chips, four systems

Quick jargon decoder

Term	Plain English
TPU	Google's own AI chip ("tensor processing unit"). It does the same job as an Nvidia GPU for AI work, but Google designs it.
Package	The physical module that holds one or more slices of silicon plus their memory. Two chips in one package act like one bigger chip.
HBM	High-bandwidth memory: stacks of memory sitting right next to the chip. Capacity (GB) is the size of the warehouse. Bandwidth (TB/s) is the width of the loading dock.
SRAM	A small amount of extremely fast memory built into the chip itself. Think of it as the desk, versus HBM as the filing cabinet across the room.
Context window	How much text (or code, or video) a model can keep "in mind" at once. Million-token windows are now a selling point.
KV cache	The model's running notes on everything in its context. It grows as the context grows, and the chip re-reads it to write every new word.
Confidential computing	Data is normally encrypted on disk and on the network, but has to be unlocked in memory while the computer uses it. Confidential computing keeps it protected while in use.

What Google actually announced

From Google's post by Amin Vahdat, Google's SVP and chief technologist for AI and infrastructure:

TPU 8i Max is aimed at what Google calls "the memory wall." Google "took two low-latency TPU 8i chips and combined them onto a single package," delivering "double the compute, double the SRAM and double the HBM bandwidth of TPU 8i." Because it "fits twice the silicon within the existing rack footprint," Google says it packs more compute per square foot and per watt. The pitch is "dozens of AI agents" working across "an entire software codebase or hours of video at once."

TPU 8tx is "built on the same silicon as TPU 8t and paired with 5th Generation AMD EPYC CPU hosts." It's for "regulated enterprises and governments," keeping "sensitive data and model weights protected and isolated even while in active use." It borrows the 8i's low-latency network (Google calls it Boardfly), and Google claims "up to 2x lower latency compared to TPU 8t with a near-zero performance penalty." Google also pitches it for fine-tuning, distillation and reinforcement learning on private data without moving that data to another cluster.

Google's post also said, plainly, that "there's an important difference between a new chip and a new system." Designing a chip takes years. Repackaging chips you already make, with different memory, hosts or networking, takes months. That's the strategic point: Google is showing it can ship new configurations at the speed customers ask for them.

What Google's post did not include: absolute specs for either new system, prices, regions, or an availability date. TechTarget also reports that "Google did not provide any availability dates and pricing."

The specs, and the number that doesn't double

Google's April technical deep dive gives the baseline. A single TPU 8i has 288 GB of HBM, 8,601 GB/s of HBM bandwidth, 384 MB of SRAM and 10.1 petaflops of peak FP4 compute (FP4 is a low-precision number format used to run AI models quickly).

For the 8i Max, here's what's been reported:

HBM bandwidth: 17.2 TB/s and SRAM: 768 MB, per TechTarget. Both match a clean doubling of the 8i (my math: 2 × 8,601 GB/s ≈ 17.2 TB/s; 2 × 384 MB = 768 MB).
HBM capacity: 384 GB, per Google Cloud's Mark Lohmeyer, quoted by Data Center Knowledge.
Compute: Google says "double." Nobody has published a number. Doubling 10.1 would be about 20.2 petaflops of FP4 (my math, assuming a clean 2x).

Here's the oddity. Two full TPU 8i chips would carry 2 × 288 = 576 GB of HBM (my math). The 8i Max is quoted at 384 GB, which is 1.33x one chip, not 2x. Google's own post is careful: it says double the bandwidth, never double the capacity. Some coverage got this wrong and reported doubled memory capacity (Anadolu Agency, for one). Google hasn't explained how it gets 2x bandwidth with only 1.33x capacity. Using fewer or smaller memory stacks per chip would be one way to do it, but that's my guess, not something Google said.

Memory per chip package: capacity vs. bandwidth

How does that stack up against the GPUs? Per vendor spec pages, an Nvidia Rubin GPU has 288 GB of HBM4 at 19.2 TB/s (Nvidia, the figure Nvidia quietly lowered from 22 TB/s), and AMD's MI455X has 432 GB at 23.3 TB/s (AMD). So even doubled, the 8i Max package still trails both on raw bandwidth per package, and it lands between them on capacity.

One way to see what that means for serving AI: divide bandwidth by capacity to get how many times per second a chip could read its entire memory. (When a model writes an answer, it re-reads its weights and KV cache for every token, so this is a rough ceiling on tokens per second for a job that fills the memory.)

TPU 8i: 8,601 ÷ 288 ≈ 30 times per second
TPU 8i Max: 17,200 ÷ 384 ≈ 45 times per second
Nvidia Rubin: 19,200 ÷ 288 ≈ 67 times per second
AMD MI455X: 23,300 ÷ 432 ≈ 54 times per second

(All my math, from vendor-stated peak figures. Real systems never hit peak, and this ignores the on-chip SRAM, which is exactly where the TPU is strongest.)

The takeaway: the 8i Max is a big step up on the single 8i for "read a huge context, fast" work, about 1.5x on that ratio (my math: 45 ÷ 30). It does not out-spec a Rubin per package. Google's counter is everything around the chip: 768 MB of SRAM, its Boardfly network, and TPU Sync, new open-source software that moves the KV cache between chip memory, host memory and storage. Google claims TPU Sync cuts KV transfer latency and time to first token "by more than 90%." That's a vendor claim with no published test setup.

Also note: peak-flops comparisons between Google and Nvidia aren't apples to apples. Nvidia lists 50 petaflops of NVFP4 for inference and 35 for training on the same Rubin GPU page, and vendors count these differently. Memory numbers are the cleaner comparison.

Why the 8tx matters more than it looks

Confidential computing sounds like a checkbox. For banks, hospitals and governments, it's often the thing that decides whether a model can touch their data at all. Patrick Moorhead of Moor Insights & Strategy put the use case well: "A bank or government agency can fine-tune, distill and run reinforcement learning on the same confidential system that serves the model, without moving sensitive data between clusters" (TechTarget).

IDC's Dave McCarthy told Data Center Knowledge that "if Google can come out with a strong confidential compute story, it kind of gives them a little bit of an edge," adding that Nvidia is still developing its strategy here. Lohmeyer also said Google will let select customers deploy the 8tx in their own data centers, per DCK. That matters for government buyers who won't put certain workloads in anyone's public cloud.

The AMD detail is interesting too. Google's April TPUs use its own Arm-based Axion CPUs as hosts (deep dive). The 8tx switches to AMD EPYC. Google didn't say why. My read is that AMD's server CPUs already have mature, widely audited memory-encryption features that regulated buyers know, but Google didn't name the technology, so treat that as my inference. Nobody outside Google has tested the "near-zero performance penalty" claim yet.

The money: TPUs are becoming a product, not a science project

Specs aside, this is a business story. Per Alphabet's Q3 2026 release:

Google Cloud revenue: $30.7 billion, up 103% from $15.2 billion a year earlier.
Google Cloud operating income: $11.1 billion, up from $3.6 billion. That's a ~36% operating margin, versus ~24% a year ago (my math: 11,121 ÷ 30,709 and 3,594 ÷ 15,157).
Alphabet says Google Cloud "generates product revenues primarily from the sale of TPU systems," and that TPU system sales were "a meaningful contributor to revenue growth."
The flip side: Alphabet spent $51.4 billion on capex in Q3 and its free cash flow was negative $9.1 billion for the quarter (same release). Selling TPUs is one way to get some of that spending back from outside customers.

Google Cloud, Q3 2025 vs. Q3 2026

Distribution is widening too. On Oct 27, Oracle said Google TPUs will be available on Oracle Cloud starting in calendar 2027, "the first time Google TPUs will be offered on a hyperscale cloud platform outside Google." Add on-premise deployment and "nearly 100 customers," per Google's post, and the TPU is starting to look like a product line you can buy several ways, not just Google's in-house chip.

McCarthy's other point to DCK is the one I'd underline: more silicon in the same rack footprint could help Google add capacity "without adding more racks or building more data centers, at least in the near term." In a market where power is the bottleneck, squeezing more out of buildings you already have is worth a lot. Google didn't say how much more power a rack of 8i Max draws, so that density claim can't be checked yet.

What I think

Bull case: Google can now turn customer requests into shipping systems in months by remixing chips it already makes. Four systems in a year is a genuine flex on cadence. The 8tx gives it a credible on-premise, confidential product for governments and banks, where Nvidia's story is still forming. And the finances show it's working: Cloud doubled and margins expanded while TPU sales became material.
Bear case: None of this ships until 2027, and every performance figure is Google's own. On paper, the 8i Max still trails Rubin and MI455X on bandwidth per package, and its memory capacity only grows a third. Getting off Nvidia's software still takes engineering time, even with PyTorch support improving. And by 2027, Nvidia and AMD will have moved too.
My take: Don't read this as "Google beats Nvidia on specs." It doesn't. Read it as Google building a menu: training, fast inference, confidential, and long-context, sold through Google Cloud, Oracle, and customers' own buildings. For AI buyers, a credible second supplier is leverage on price. The 384 GB number is the one I'd watch: if long-context agents end up limited by memory size rather than speed, Google will need TPU Sync to deliver what it promises.

What I'm watching

CoreWeave reports Q3 results after the close today (call at 5 p.m. ET, 2 p.m. PT) (CoreWeave IR). As I flagged yesterday, funding costs and delivery dates still drive this market. CNBC's preview has the debt and capex questions.
Real 8i Max and 8tx specs: official HBM capacity, rack power, and the first independent benchmarks.
Prices and regions for both systems, and whether the 2027 date holds.
Who the first named 8tx customer is, especially any government on-premise deal.